DSP-Based Parallel Implementation of Speeded-Up Robust Features

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Bibliographische Detailangaben

Zeitschriftentitel:	IEICE Transactions on Information and Systems
Personen und Körperschaften:	LIAO, Chao, WANG, Guijin, MIAO, Quan, WANG, Zhiguo, SHI, Chenbo, LIN, Xinggang
In:	IEICE Transactions on Information and Systems, E94-D, 2011, 4, S. 930-933
Medientyp:	E-Article
Sprache:	Englisch
veröffentlicht:	Institute of Electronics, Information and Communications Engineers (IEICE)
Schlagwörter:	Artificial Intelligence Electrical and Electronic Engineering Computer Vision and Pattern Recognition Hardware and Architecture Software